As digital switch mode power supply (SMPS) power conversion applications become ever more sophisticated, the number of PWM output used in an application are rapidly increasing. Also the parameters that define each PWM output signal are increasing and now include duty cycle, period, phase offset, and dead-time. Also the rate at which all of this data needs to be updated is increasing. The net result is that a very large number of data values must be computed and transferred from the processor to the PWM peripheral in a limited amount of time. Therefore, a problem exists in that it is becoming more difficult to insure that all of the required data that defines a PWM signal data set is transferred into the PWM controller before the start of the next PWM cycle. If the data transfers over a PWM cycle boundary, the behavior of the PWM module may become unpredictable.